IBPS IT SO-Operating system-Process Structures

Process Structures

1) The initial program that is run when the computer is powered up is called :
a) boot program
b) bootloader
c) initializer
d) bootstrap program

Answer: d
Explanation: None.

2) How does the software trigger an interrupt ?
a) Sending signals to CPU through bus
b) Executing a special operation called system call
c) Executing a special program called system program
d) Executing a special program calle interrupt trigger program

Answer: b
Explanation: None.

3) What is a trap/exception ?
a) hardware generated interrupt caused by an error
b) software generated interrupt caused by an error
c) user generated interrupt caused by an error
d) None of these

Answer: b
Explanation: None.

4) What is an ISR ?
a) Information Service Request
b) Interrupt Service Request
c) Interrupt Service Routine
d) Information Service Routine

Answer: c
Explanation: None.

5) An interrupt vector
a) is an address that is indexed to an interrupt handler
b) is a unique device number that is indexed by an address
c) is a unique identity given to an interrupt
d) None of these

Answer: a
Explanation: None.

6) DMA is used for : (choose two)
a) High speed devices(disks and communications network)
b) Low speed devices
c) Saving CPU cycles
d) Utilizing CPU cycles

Answer: a and c
Explanation: None.

7) In a memory mapped input/output :
a) the CPU uses polling to watch the control bit constantly, looping to see if device is ready
b) the CPU writes one data byte to the data register and sets a bit in control register to show that a byte is available
c) the CPU receives an interrupt when the device is ready for the next byte
d) the CPU runs a user written code and does accordingly

Answer: b
Explanation: None.

8) In a programmed input/output(PIO) :
a) the CPU uses polling to watch the control bit constantly, looping to see if device is ready
b) the CPU writes one data byte to the data register and sets a bit in control register to show that a byte is available
c) the CPU receives an interrupt when the device is ready for the next byte
d) the CPU runs a user written code and does accordingly

Answer: a
Explanation: None.

9) In an interrupt driven input/output :
a) the CPU uses polling to watch the control bit constantly, looping to see if device is ready
b) the CPU writes one data byte to the data register and sets a bit in control register to show that a byte is available
c) the CPU receives an interrupt when the device is ready for the next byte
d) the CPU runs a user written code and does accordingly

Answer: c
Explanation: None.

10) In the layered approach of Operating Systems : (choose two)
a) Bottom Layer(0) is the User interface
b) Highest Layer(N) is the User interface
c) Bottom Layer(0) is the hardware
d) Highest Layer(N) is the hardware

Answer: b and c
Explanation: None.

11) How does the Hardware trigger an interrupt ?
a) Sending signals to CPU through system bus
b) Executing a special program called interrupt program
c) Executing a special program called system program
d) Executing a special operation called system call

Answer: a
Explanation: None.

12) Which operation is performed by an interrupt handler ?
a) Saving the current state of the system
b) Loading the interrupt handling code and executing it
c) Once done handling, bringing back the system to the original state it was before the interrupt occurred
d) All of these

Answer: d
Explanation: None.